Micron Technology: The Automata Processor



  • In typical Micron investor relations style, the company announced the very important Automata Processor at an evening presentation at Supercomputing 2013.
  • In typical Micron investor relations style, we haven’t heard much about the progress, or lack thereof, since the announcement.
  • In typical Micron investor relations style, shareholders know very little about the technology while academicians, competitors, potential customers and suppliers likely know a lot.

Micron Technolgy Inc. (NASDAQ:MU) has a strange way of making announcements. On November 18, 2013, at a late afternoon/early evening session of Supercomputing 2013, Micron announced the very important and ground breaking Automata Processor. There were no potential customers or white papers presented at the unveiling. No meteorologists, DNA sequencers,cyptographers or malware experts were on hand to tell us how this technology would fundamentally change their jobs and the speed with which they would now be able to deliver computational results. (One might have hoped Micron had learned from this lesson but their hastily scheduled unveling, along with partner Intel (NASDAQ:INTC), of the equally momentous 3DXpoint memory was made on July 28, 2015, and was also devoid of whitepapers, key facts, detailed timelines and experts who could talk about what the technology would mean for them.)


So what is Automata Processor? Today, all computers store data and instructions in memory and face a terrible bottleneck getting data into the processor and results out of the processor. This is the so-called von Neumann bottleneck:

The von Neumann bottleneck is a limitation on throughput caused by the standard personal computer architecture.

The term is named for John von Neumann, who developed the theory behind the architecture of modern computers. Earlier computers were fed programs and data for processing while they were running. Von Neumann came up with the idea behind the stored program computer, our standard model, which is also known as the von Neumann architecture. In the von Neumann architecture, programs and data are held in memory; the processor and memory are separate and data moves between the two. In that configuration, latency is unavoidable.

What Micron has done with its Automata Processor is design a massively parallel process which can be accomplished in DRAM memory, with only the results and perhaps a buffer of relevant content reported to the CPU.

Most importantly, this announcement doesn’t just appear to be “slideware.” There is actual hardware floating around as this, ahem, slide shows:


The slide above is from a presentation made by the Center for Automata Processing which Micron helped establish at the University of Virginia. Information is still a bit thin on their website, but at least there’s a growing repository.

What about the schedule? Various articles which came out after the announcement suggested that development hardware would be available in 2014. Here’s one example from February 2014:

It’s coming soon, but you can’t get your hands on the AP quite yet. Micron is making silicon now but a revision is planned, so don’t expect hardware samples until the second half of 2014.

But now the Center for Automata Processing informs us 2016 will be the hardware reveal:

Micron will begin to make its hardware available in early 2016. In the meantime, the AP software allows development, testing and performance modeling.

Why can’t Micron provide regular updates? Will they talk about schedule or give us an update at the August 14, 2015, analyst day? Is the delay good news? Does it mean we will see an implementation on 3DXpoint instead of in volatile and power hungry DRAM?

And what will it be able to do? There’s not a whole heck of a lot of specifics out there despite this two-year-old announcement. One very cute, if quite geeky, simulator appears on a Micron website, micronautomata.com That website also contains some information on the software development kit and other documentation.

This led me to look for articles which might show what the Automata Processor might do for different industries. A few free downloads are listed on the CAP website. One article, alas behind a paywall, really tickled my interest with its bestseller title:

“Discovering Motifs in Biological Sequences using the Micron Automata Processor.”

The Abstract pulls you right into this spell binding material:


Finding approximately conserved sequences, called motifs, across multiple DNA or protein sequences is an important problem in computational biology. In this paper, we consider the (l; d) motif search problem of identifying one or more motifs of length l present in at least q of the n given sequences, with each occurrence differing from the motif in at most d substitutions. The problem is known to be NP-complete, and the largest solved instance reported to date is (26; 11). We propose a novel algorithm for the (l; d) motif search problem using streaming execution over a large set of Non-deterministic Finite Automata (NFA). This solution is designed to take advantage of the Micron Automata Processor, a new technology close to deployment that can simultaneously execute multiple NFA in parallel. We demonstrate the capability for solving much larger instances of the (l; d) motif search problem using the resources available within a single Automata Processor board by estimating run-times for problem instances (39; 18) and (40; 17). The paper serves as a useful guide to solving problems using this new accelerator technology.

And here’s this liberal arts major’s attempt to translate that into English. Those working with the human genome often need to find a sequence which repeats, or nearly repeats with some substitutions, of particular sequences or “motifs.” The abstract is saying that the maximum size which has been solved to date is a sequence 26 characters long with as many as 11 substitutions. One has to dig way back in the document (Section 7.2) to discover that this problem took 46.9 hours on a massive very expensive 48 core machine. The article points out that the Automata Processor is examining a 25MB chunk of the data with each clock tick. Table 1 in the document shows estimates that the Automata Processor will be able to solve the previously unsolved 40 character “motifs” with up to 17 substitutions in under an hour.

Conclusions. Micron is working on some wonderful stuff. The academics at the University of Georgia, who wrote the article cited above, and the academics at the University of Virginia, Center for Automata Processing, know all about the Automata Processor, its capabilities and timelines. But the poor shareholders of Micron know comparatively little. Lets hope Micron does a “technology day,” like their partner Intel’s excellent Intel Developers Forum. They could tell us a whole lot about Automata, the Hybrid Memory Cube, Storage Class Memory and probably a whole lot of other initiatives we know nothing about. I’m hoping for some update on Automata at the Analyst Day on August 14, 2015.

Courtesy Seekingalpha